Archive for the ‘VLSI Design and Technology’ Category

Simple nMOS fabrication:Process steps

January 31st, 2011 Remo No comments

Simple nMos:

1 .Thin wafer from single crystal silicon taken

2. 1 micron silicon dioxide grown over the surface for protecting from other dopant during different
during different phases of the  diffusion.

3.  Surface now covered with phtoresist of uniform thickness

4. Photoresist now exposed to ultravolet light through mask.(Mask define the areas where diffusion  has to be taken placce).UV exposed parts get polymerized(hardened) and other parst not hardened

5. After etching the required areas (where diffusion will take place later on)bare wafer surface is now open and ready for diffusion.

6. Remaining photoresist removed a thin silicon dioxide (0.1 micron) layer grown over entire chip surface ,then poly silicon is deposited to form the gate gate structure.

7. For patterning of polysilicon further photoresist coating and masking done.Then thin silicon dioxide (0.1 micron typical)removed to get a window foir diffusion.

8. These diffusion will create source and drain.Diffusion achieved by heating the wafer and passing  a gas  containing  a type impurity.

9. Silicon dioxide grown over all again  and then masked with photoresist and etched to expose selected areas of the polysilicon gate and drain and source  for contact cuts(i.e from where contacts will be taken).

10.    Then metal deposition done (1 micron  typical).The metal layer is then masked and etched to from the required interconection pattern.