Now we look at the simplest of gates: the NOT gate, or the inverter. The most popular method to build an inverter is using the static CMOS technology, and so we’re going to use that to see how much power consumption that particular architecture has.
CMOS circuits are constructed so that all PMOS transistors must have either an input from the voltage source or from another PMOS transistor. Similarly, all NMOS transistors must have either an input from ground or from another NMOS transistor. The composition of a PMOS transistor creates low resistance when a low voltage is applied to it and high resistance when a high voltage is applied to it. On the other hand, the composition of an NMOS transistor creates high resistance when a low voltage is applied to it and low resistance when a high voltage is applied to it.
The image on the top shows what happens when an input is connected to both a PMOS transistor and an NMOS transistor. When the voltage of input A is low, the NMOS transistor has high resistance so it stops voltage from leaking into ground, while the PMOS transistor has low resistance so it allows the voltage source to transfer voltage through the PMOS transistor to the output. The output would therefore register a high voltage.
On the other hand, when the voltage of input A is high, the PMOS transistor would have high resistance so it would block voltage source from the output, while the NMOS transistor would have low resistance allowing the output to drain to ground. This would result in the output registering a low voltage. In short, the outputs of the PMOS and NMOS transistors are complementary such that when the input is low, the output would be high, and when the input is high, the output would be low. Because of this, the CMOS circuits’ output is by default the inversion of the input.